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Cortex-A series processors

ARM documentation set for the ARM Cortex-A family of processors, including the ARM Cortex-A15 MPCore, ARM Cortex-A9 MPCore, ARM Cortex-A9 single core, ARM Cortex-A8, ARM Cortex-A7 MPCore, and ARM Cortex-A5 processors.

The ARM Cortex-A Series is a family of applications processors for complex OS and user applications. The Cortex-A family processors support the ARM and Thumb instruction sets, incorporating Thumb 2-technology.

The ARM Cortex-A15 MPCore processor has an out-of-order superscalar pipeline with a tightly-coupled low-latency level-2 cache that can be up to 4MB in size. The Cortex-A15 MPCore processor implements the ARMv7-A architecture profile.

The ARM Cortex-A9 processor is a very high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities. The Cortex-A9 processor implements the ARMv7-A architecture profile and can execute 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions, and 8-bit Java bytecodes in Jazelle state.

The ARM Cortex-A8 processor is a high-performance, low-power, cached application processor that implements the ARMv7-A architecture profile and provides full virtual memory capabilities.

The ARM Cortex-A7 MPCore processor is fully compatible with other Cortex-A family of processors and incorporates all of the features of the high-performance Cortex-A15 MPCore processor including virtualization, Large Physical Address Extension (LPAE), NEON Media Processing Engine (MPE) Advanced SIMD, and AMBA 4 ACE coherency support. The Cortex-A7 MPCore processor implements the ARMv7-A architecture profile.

The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.

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