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	<title>Comments on: Re:- Atomic Context and Process Context</title>
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	<description>Embedded System and ARM Training</description>
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		<title>By: manoj7410</title>
		<link>https://www.emblogic.com/blog/11/re-atomic-context-and-process-context/#comment-3011</link>
		<dc:creator><![CDATA[manoj7410]]></dc:creator>
		<pubDate>Thu, 15 Nov 2012 05:06:20 +0000</pubDate>
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		<description><![CDATA[Hi, 

Atomic means &quot;Either do it completely or don&#039;t do it&quot;, it should not be interrupted, for example an ISR can have two parts, top half and bottom half. top half should not be interrupted and should be small, the complete top half should run in a single time, no switching of the processor should be allowed during top half execution. It should be atomic.

And process context is nothing but a context in which a process can be interrupted. Like bottom half. (It can have semaphores, Sleeps, delay, etc.)

Thanks]]></description>
		<content:encoded><![CDATA[<p>Hi, </p>
<p>Atomic means &#8220;Either do it completely or don&#8217;t do it&#8221;, it should not be interrupted, for example an ISR can have two parts, top half and bottom half. top half should not be interrupted and should be small, the complete top half should run in a single time, no switching of the processor should be allowed during top half execution. It should be atomic.</p>
<p>And process context is nothing but a context in which a process can be interrupted. Like bottom half. (It can have semaphores, Sleeps, delay, etc.)</p>
<p>Thanks</p>
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